In modern data processing systems, for example personal computers (PCs) and workstations, graphics subsystems perform the task of graphic data processing. Graphic data is exchanged between a host processor (CPU) and a video display device such as a cathode ray tube (CRT) device, a liquid crystal display (LCD) device, or the like. Display devices commonly support one or more pixel resolutions, for example, VGA mode (640.times.480 pixels), Super VGA (SVGA) mode (800.times.600), and Extended Graphics Array (XGA) mode (1024.times.768). With the advent of high-powered processors, for example Pentium.TM. processors and increasingly-sophisticated operating systems, for example Windows.TM. operating systems, capable of absorbing hardware differences, graphics subsystems have been integrated into a single chip so as to reduce their production costs and power consumption. These integrated graphics chips are commonly referred to as "graphics accelerators".
Graphics accelerators commonly employ multi-port Video RAMS (VRAMs), which include an additional serial port for faster throughput and are therefore suitable for use in high-end applications. To further improve performance, contemporary systems include integrated circuits which improve system speed and conserve space by integrating larger parts of the graphics subsystem, either the logic and standard dynamic RAM (DRAM) separately or the entire subsystem, into the DRAM. These integrated graphics systems are developed for portable applications such as notebook size computers. These forms of RAM are referred to as "multiported" because they include two ports which provide different functions: the random port interfaces with the processor or controller; the serial port provides fast data to the video display devices by means of a wide parallel transfer internal to the RAM. A serial register required for the serial port increases the cost of the VRAM, however, and the larger, more expensive package size resulting from the dual ports, and therefore increased pin count, consumes more space on the PC board. The testing procedure is also more complex for the multi-port VRAM which increases manufacturing costs.
The data rate of the single-port DRAM has increased significantly with the introduction of the Extended Data Out mode, (EDO) or Hyperpage mode, and with the introduction of synchronous DRAMs with very wide interfaces. This has led to the increased use of fast, wide, single port DRAMs in graphics subsystems, coupled with the use of standard graphics accelerators which provide the multi-port interface to the processor and the RAMDAC (Random Access Memory Digital-to-Analog Computer). Many single-port DRAM variants are also being developed such as the synchronous graphics DRAMs and the Multi-bank DRAM.
To effectively communicate with single port DRAMs for computer graphics, graphics accelerators usually include a first-in first-out (FIFO) buffer. In a graphics accelerator with a FIFO buffer, a certain amount of video data, for example the capacity of the FIFO, is read from a frame buffer into the FIFO buffer, where it is passed on to a video display device. The frequency of access of the graphics accelerator to the FIFO buffer is therefore determined by the FIFO capacity A higher FIFO access frequency decreases the frame buffer access time of the CPU. This, in turn, causes considerable system performance degradation, particularly, in the case where a single-port RAM is employed as a frame buffer.
With the advent of high-definition television (HDTV) and large screen television (TV) and the rapid advancement of multimedia PCs, there is a heightened demand for graphics accelerators suitable for use with television video signals. To meet this demand, graphics accelerators now include video encoders which convert computer video signals into video signals suitable for television. A graphics accelerator with a. video encoder is capable of displaying computer-processed images on a television screen, by transferring video data stored in frame buffer to a television via a FIFO buffer. However, when computer video data in the form of widely used progressive scan or non-interlaced formats is converted by a video encoder into interlace-scan television video data for display on a television screen, flickers visible to the human eye occur, which adversely affects image quality.